Autori: Stojcev Mile K
| Naslov | Address generators for linear systolic array (Article) |
| Autori | Stojcev Mile K Milovanovic Igor Z Milovanovic Emina I Nikolic Tatjana R |
| Info | MICROELECTRONICS RELIABILITY, (2010), vol. 50 br. 2, str. 292-303 |
| Projekat | Serbian Council of Science and Environmental Protection [144034] |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | Multi-functional systolic array with reconfigurable micro-power processing elements (Article) |
| Autori | Milovanovic Emina I Nikolic Tatjana R Stojcev Mile K Milovanovic Igor Z |
| Info | MICROELECTRONICS RELIABILITY, (2009), vol. 49 br. 7, str. 813-820 |
| Projekat | Serbian Ministry of Science [144034] |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | CDMA bus-based on-chip interconnect infrastructure (Article) |
| Autori | Nikolic Tatjana R Stojcev Mile K Djordjevic Goran Lj |
| Info | MICROELECTRONICS RELIABILITY, (2009), vol. 49 br. 4, str. 448-459 |
| Projekat | Serbian Ministry of Science and Technological Development [TR-11020] |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | Clock aligner based on delay locked loop with double edge synchronization (Article) |
| Autori | Stojcev Mile K Jovanovic Goran S |
| Info | MICROELECTRONICS RELIABILITY, (2008), vol. 48 br. 1, str. 158-166 |
| Ispravka | ISI/Web of Science Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | An adaptive pulse-width control loop (Article) |
| Autori | Jovanovic Goran S Mitic Dragan S Stojcev Mile K |
| Info | INTERNATIONAL JOURNAL OF ELECTRONICS, (2006), vol. 93 br. 5, str. 291-311 |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | Current starved delay element with symmetric load (Article) |
| Autori | Jovanovic Goran S Stojcev Mile K |
| Info | INTERNATIONAL JOURNAL OF ELECTRONICS, (2006), vol. 93 br. 3, str. 167-175 |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | A mid-value select voter (Article) |
| Autori | Krstic MD Stojcev Mile K Djordjevic Goran Lj Andrejic ID |
| Info | MICROELECTRONICS RELIABILITY, (2005), vol. 45 br. 3-4, str. 733-738 |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | Approach to partially self-checking combinational circuits design (Article) |
| Autori | Djordjevic Goran Lj Stojcev Mile K Stankovic Tatjana R |
| Info | MICROELECTRONICS JOURNAL, (2004), vol. 35 br. 12, str. 945-952 |
| Ispravka | ISI/Web of Science Članak Citati: ISI/Web of Science Scopus |
| Naslov | Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits (Article) |
| Autori | Stojcev Mile K Djordjevic Goran Lj Stankovic Tatjana R |
| Info | MICROELECTRONICS RELIABILITY, (2004), vol. 44 br. 1, str. 173-178 |
| Ispravka | ISI/Web of Science Članak Elečas Rang časopisa Citati: ISI/Web of Science Scopus |
| Naslov | A hardware mid-value select voter architecture (Article) |
| Autori | Stojcev Mile K Djordjevic Goran Lj Krstic MD |
| Info | MICROELECTRONICS JOURNAL, (2001), vol. 32 br. 2, str. 149-162 |
| Ispravka | ISI/Web of Science Članak Citati: ISI/Web of Science Scopus |
