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Autori: Teodorovic Predrag

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Naslov Upscale Layer Acceleration on Existing AI Hardware (Article; Early Access)
Autori Vranjkovic Vuk S  Teodorovic Predrag  Struharik Rastislav J 
Info IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, (2025), vol. br. , str. -
Projekat Ministry of Science, Technological Development and Innovation [451-03-137/2025-03/200156]; Faculty of Technical Sciences, University of Novi Sad [01-50/295]
Ispravka ISI/Web of Science   Članak   Elečas   Rang časopisa   Citati:
Naslov Puppis: Hardware Accelerator of Single-Shot Multibox Detectors for Edge-Based Applications (Article)
Autori Vrbaski Vladimir  Josic Slobodan  Vranjkovic Vuk S  Teodorovic Predrag  Struharik Rastislav J 
Info ELECTRONICS, (2023), vol. 12 br. 22, str. -
Projekat European Union's Horizon 2020 research and innovation program
Ispravka ISI/Web of Science   Članak   Elečas   Rang časopisa  
Naslov Universal Reconfigurable Hardware Accelerator for Sparse Machine Learning Predictive Models (Article)
Autori Vranjkovic Vuk S  Teodorovic Predrag  Struharik Rastislav J 
Info ELECTRONICS, (2022), vol. 11 br. 8, str. -
Projekat European Union's Horizon 2020 research and innovation programme [856967]; Ministry of Education, Science and Technological Development [451-03-68/2022-14/200156]
Ispravka ISI/Web of Science   Članak   Elečas   Rang časopisa   Citati: ISI/Web of Science   Scopus  
Naslov Hardware Acceleration of Sparse Oblique Decision Trees for Edge Computing (Article)
Autori Teodorovic Predrag  Struharik Rastislav J 
Info ELEKTRONIKA IR ELEKTROTECHNIKA, (2019), vol. 25 br. 5, str. 18-24
Projekat Serbian Ministry of Education and Science [TR32016]
Ispravka ISI/Web of Science   Članak   Elečas   Rang časopisa   Citati: ISI/Web of Science   Scopus  
Naslov Reducing off-chip memory traffic in Deep CNNs using Stick Buffer Cache (Proceedings Paper)
Autori Rakanovic Damjan M  Erdeljan Andrea M  Vranjkovic Vuk S  Vukobratovic Bogdan Z  Teodorovic Predrag  Struharik Rastislav J 
Info 2017 25TH TELECOMMUNICATION FORUM (TELFOR), (2017), vol. br. , str. 514-517
Projekat Serbian Ministry of Education and Science [TR32016]
Ispravka ISI/Web of Science   Citati: ISI/Web of Science   Scopus  
Naslov Recursive Boolean Formula Minimization Algorithms for Implication Logic (Article)
Autori Teodorovic Predrag  Dautovic Stanisa  Malbasa Veljko D 
Info IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, (2013), vol. 32 br. 11, str. 1829-1833
Projekat EC FP7 REGPOT [256615]; [MNTR32016]
Ispravka ISI/Web of Science   Članak   Elečas   Rang časopisa   Citati: ISI/Web of Science   Scopus  
Naslov Sequence Generator for Computing Arbitrary n-input Boolean Function Using Two Memristors (Proceedings Paper)
Autori Teodorovic Predrag  Vukobratovic Bogdan Z  Struharik Rastislav J  Dautovic Stanisa 
Info 2012 20TH TELECOMMUNICATIONS FORUM (TELFOR), (2012), vol. br. , str. 1052-1055
Ispravka ISI/Web of Science   Citati: ISI/Web of Science  
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