@ARTICLE{
author={Kastelan Ivan,Krajacevic Zoran},
year={2009},
title={Synthesizable SystemVerilog Assertions as a Methodology for SoC Verification},
journal={2009 1ST IEEE EASTERN EUROPEAN CONFERENCE ON THE ENGINEERING OF COMPUTER BASED SYSTEMS},
volume={},
number={},
pages={120-127},
document_type={Proceedings Paper},
} 

@ARTICLE{
author={Zlokolica Vladimir M,Katona Mihajlo,Juenke M,Krajacevic Zoran,Teslic Nikola Dj,Temerinac Miodrag},
year={2008},
title={Real-Time Wavelet-Spatial-Activity-Based Adaptive Video Enhancement Algorithm for FPGA},
journal={ADVANCED CONCEPTS FOR INTELLIGENT VISION SYSTEMS, PROCEEDINGS},
volume={5259},
number={},
pages={182-193},
document_type={Proceedings Paper},
} 

@ARTICLE{
author={Katona Mihajlo,Krajacevic Zoran,Teslic Nikola Dj,Kovacevic Vladimir},
year={2005},
title={Signal processing algorithms implementation with FPGAs},
journal={Telsiks 2005, Proceedings, Vols 1 and 2},
volume={},
number={},
pages={127-130},
document_type={Proceedings Paper},
}